1. Field of the Invention
The present invention relates to a semiconductor integrated circuit device such as an LSI (large-scale integrated circuit).
2. Description of the Prior Art
In a semiconductor integrated circuit device such as an LSI, the output circuit constituting a part of each I/O cell is typically formed in a CMOS structure. Such output circuits may suffer electrostatic destruction when fed with abnormal electrostatic charge by way of their output terminal from the outside, and therefore they are usually provided with a protection circuit against static electricity.
In a conventional example shown in FIG. 5, a P-channel MOS transistor 101 and an N-channel MOS transistor 102 are connected between a power source line 106 and ground GND, with their gates connected to an input terminal 100 and their drains connected to an output terminal 103. In addition, diodes 104 and 105 are provided for protection. The diode 104 is turned on when abnormal positive electrostatic charge is applied to the output terminal 103 from the outside, so that the electrostatic charge is bypassed to the power source line 106. Meanwhile, the diode 105 remains off.
The diode 105 is turned on when abnormal negative electrostatic charge is applied to the output terminal 103, so that a current flows from ground to the output terminal 103 to discharge the electrostatic charge at the output terminal 103. These diodes 104 and 105 are, conventionally, formed separately from the transistors 101 and 102 on a semiconductor substrate.
In FIG. 6, blocks 111 and 112 are formed on a single semiconductor substrate. The block 111 includes a P-channel MOS transistor 101 and a diode 104, and the block 112 includes an N-channel MOS transistor 102 and a diode 105. The drains of the transistors 101 and 102, the anode of the diode 104, and the cathode of the diode 105 are connected together with a wire 107.
It is a well-known disadvantage of this type of output circuit that the CMOS transistors form parasitic bipolar transistors that act as thyristors. Such parasitic transistors cause a condition called "latchup", and thereby induce malfunctioning of the CMOS transistors.
To avoid the formation of such parasitic transistors that act as thyristors, it has been customary to secure a sufficient interval 108 between adjacent blocks ill and 112. On the other hand, the protection provided by the protection circuit composed simply of diodes 104 and 105 has been insufficient to cope with extremely high electrostatic charge applied to the output circuit 103.